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| fax id: 6127 For new designs see CY7C372i CY7C372 UltraLogicTM 64-Macrocell Flash CPLD Features * * * * * * 64 macrocells in four logic blocks 32 I/O pins 6 dedicated inputs including 2 clock pins Bus Hold capabilities on all I/Os and dedicated inputs No hidden delays High speed -- fMAX = 125 MHz -- tPD = 10 ns -- tS = 5.5 ns -- tCO = 6.5 ns * Electrically alterable Flash technology * Available in 44-pin PLCC and CLCC packages * Pin compatible with the CY7C371 of use and high performance of the 22V10 to high-density CPLDs. The 64 macrocells in the CY7C372 are divided between four logic blocks. Each logic block includes 16 macrocells, a 72 x 86 product term array, and an intelligent product term allocator. The logic blocks in the FLASH370 architecture are connected with an extremely fast and predictable routing resource--the Programmable Interconnect Matrix (PIM). The PIM brings flexibility, routability, speed, and a uniform delay to the interconnect. Like all members of the FLASH370 family, the CY7C372 is rich in I/O resources. Every two macrocells in the device feature an associated I/O pin, resulting in 32 I/O pins on the CY7C372. In addition, there are four dedicated inputs and two input/clock pins. Finally, the CY7C372 features a very simple timing model. Unlike other high-density CPLD architectures, there are no hidden speed delays such as fanout effects, interconnect delays, or expander delays. Regardless of the number of resources used or the type of application, the timing parameters on the CY7C372 remain the same. Functional Description The CY7C372 is a Flash erasable Complex Programmable Logic Device (CPLD) and is part of the FLASH370TM family of high-density, high-speed CPLDs. Like all members of the FLASH370 family, the CY7C372 is designed to bring the ease INPUTS INPUTS CLOCK 4 INPUT MACROCELLS 2 8 I/Os I/O0-I/O7 2 INPUT/CLOCK MACROCELLS 2 8 I/Os I/O24-I/O31 LOGIC BLOCK A 36 16 PIM 36 16 LOGIC BLOCK D 8 I/Os I/O8-I/O15 LOGIC BLOCK B 36 16 36 16 LOGIC BLOCK C 8 I/Os I/O16-I/O23 7C372-1 16 16 Selection Guide Maximum Propagation Delay, tPD (ns) Minimum Set-up, tS (ns) Maximum Clock to Output, tCO (ns) Maximum Supply Commercial Current, ICC (mA) Military/Industrial Shaded areas contain preliminary information. 7C372-125 10 5.5 6.5 280 7C372-100 12 6 6.5 250 7C372-83 15 8 8 250 300 7C372-66 20 10 10 250 300 7C372L-66 20 10 10 125 Cypress Semiconductor Corporation * 3901 North First Street * San Jose * CA 95134 * 408-943-2600 December 1992 - Revised April 20, 1998 |
Price & Availability of 7C372
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